During handling of integrated circuit ("IC") chips, an electrostatic discharge ("ESD") may occur between the handler and the pins of the IC. The electrostatic discharge presents a high voltage to one or more of the IC pins. In some cases, the discharge may be powerful enough to destroy some of the devices on the IC.
Even where the devices on the chips are not destroyed, an electrostatic discharge may have negative effects. In some cases, the IC may contain one or more single bit FAMOS transistors to provide nonvolatile storage of information. These transistors are structurally identical to the FAMOS transistor used in an EPROM array. During an ESD strike on the integrated circuit, the programming signal (V.sub.pp) attached to the drains of one or more FAMOS transistors may be elevated to a voltage which is sufficient to program the FAMOS transistors. Inadvertent programming of the FAMOS transistors may affect the proper functioning of the IC.
Therefore, a need has arisen in the industry to provide protection for FAMOS transistors during an ESD strike.